pins_are_sequential(pins: List[microcontroller.Pin]) → bool¶
Return True if the pins have sequential GPIO numbers, False otherwise
StateMachine(program: _typing.ReadableBuffer, frequency: int, *, init: Optional[_typing.ReadableBuffer] = None, first_out_pin: Optional[microcontroller.Pin] = None, out_pin_count: int = 1, initial_out_pin_state: int = 0, initial_out_pin_direction: int = 4294967295, first_in_pin: Optional[microcontroller.Pin] = None, in_pin_count: int = 1, pull_in_pin_up: int = 0, pull_in_pin_down: int = 0, first_set_pin: Optional[microcontroller.Pin] = None, set_pin_count: int = 1, initial_set_pin_state: int = 0, initial_set_pin_direction: int = 31, first_sideset_pin: Optional[microcontroller.Pin] = None, sideset_pin_count: int = 1, initial_sideset_pin_state: int = 0, initial_sideset_pin_direction: int = 31, exclusive_pin_use: bool = True, auto_pull: bool = False, pull_threshold: int = 32, out_shift_right: bool = True, wait_for_txstall: bool = True, auto_push: bool = False, push_threshold: int = 32, in_shift_right: bool = True)¶
A single PIO StateMachine
The programmable I/O peripheral on the RP2 series of microcontrollers is unique. It is a collection of generic state machines that can be used for a variety of protocols. State machines may be independent or coordinated. Program memory and IRQs are shared between the state machines in a particular PIO instance. They are independent otherwise.
This class is designed to facilitate sharing of PIO resources. By default, it is assumed that the state machine is used on its own and can be placed in either PIO. State machines with the same program will be placed in the same PIO if possible. To ensure multiple state machines share a PIO use the
colocatekwarg during construction and create them one after another.
Construct a StateMachine object on the given pins with the given program.
program (ReadableBuffer) – the program to run with the state machine
frequency (int) – the target clock frequency of the state machine. Actual may be less.
init (ReadableBuffer) – a program to run once at start up. This is run after program is started so instructions may be intermingled
first_out_pin (Pin) – the first pin to use with the OUT instruction
out_pin_count (int) – the count of consecutive pins to use with OUT starting at first_out_pin
initial_out_pin_state (int) – the initial output value for out pins starting at first_out_pin
initial_out_pin_direction (int) – the initial output direction for out pins starting at first_out_pin
first_in_pin (Pin) – the first pin to use with the IN instruction
in_pin_count (int) – the count of consecutive pins to use with IN starting at first_in_pin
pull_in_pin_up (int) – a 1-bit in this mask sets pull up on the corresponding in pin
pull_in_pin_down (int) – a 1-bit in this mask sets pull up on the corresponding in pin. Setting both pulls enables a “bus keep” function, i.e. a weak pull to whatever is current high/low state of GPIO.
first_set_pin (Pin) – the first pin to use with the SET instruction
set_pin_count (int) – the count of consecutive pins to use with SET starting at first_set_pin
initial_set_pin_state (int) – the initial output value for set pins starting at first_set_pin
initial_set_pin_direction (int) – the initial output direction for set pins starting at first_set_pin
first_sideset_pin (Pin) – the first pin to use with a side set
sideset_pin_count (int) – the count of consecutive pins to use with a side set starting at first_sideset_pin
initial_sideset_pin_state (int) – the initial output value for sideset pins starting at first_sideset_pin
initial_sideset_pin_direction (int) – the initial output direction for sideset pins starting at first_sideset_pin
exclusive_pin_use (bool) – When True, do not share any pins with other state machines. Pins are never shared with other peripherals
auto_pull (bool) – When True, automatically load data from the tx FIFO into the output shift register (OSR) when an OUT instruction shifts more than pull_threshold bits
pull_threshold (int) – Number of bits to shift before loading a new value into the OSR from the tx FIFO
out_shift_right (bool) – When True, data is shifted out the right side (LSB) of the OSR. It is shifted out the left (MSB) otherwise. NOTE! This impacts data alignment when the number of bytes is not a power of two (1, 2 or 4 bytes).
wait_for_txstall (bool) – When True, writing data out will block until the TX FIFO and OSR are empty and an instruction is stalled waiting for more data. When False, data writes won’t wait for the OSR to empty (only the TX FIFO) so make sure you give enough time before deiniting or stopping the state machine.
auto_push (bool) – When True, automatically save data from input shift register (ISR) into the rx FIFO when an IN instruction shifts more than push_threshold bits
push_threshold (int) – Number of bits to shift before saving the ISR value to the RX FIFO
in_shift_right (bool) – When True, data is shifted into the right side (LSB) of the ISR. It is shifted into the left (MSB) otherwise. NOTE! This impacts data alignment when the number of bytes is not a power of two (1, 2 or 4 bytes).
The actual state machine frequency. This may not match the frequency requested due to internal limitations.
True when the state machine has stalled due to a full RX FIFO since the last
The number of words available to readinto
__exit__(self) → None¶
Automatically deinitializes the hardware when exiting a context. See Lifetime and ContextManagers for more info.
run(self, instructions: _typing.ReadableBuffer) → None¶
Runs all given instructions. They will likely be interleaved with in-memory instructions. Make sure this doesn’t wait for input!
This can be used to output internal state to the RX FIFO and then read with
write(self, buffer: _typing.ReadableBuffer, *, start: int = 0, end: Optional[int] = None) → None¶
Write the data contained in
bufferto the state machine. If the buffer is empty, nothing happens.
readinto(self, buffer: _typing.WriteableBuffer, *, start: int = 0, end: Optional[int] = None) → None¶
- Read into
buffer. If the number of bytes to read is 0, nothing happens. The buffer
include any data added to the fifo even if it was added before this was called.
- Read into
write_readinto(self, buffer_out: _typing.ReadableBuffer, buffer_in: _typing.WriteableBuffer, *, out_start: int = 0, out_end: Optional[int] = None, in_start: int = 0, in_end: Optional[int] = None) → None¶
Write out the data in
buffer_outwhile simultaneously reading data into
buffer_in. The lengths of the slices defined by
buffer_in[in_start:in_end]may be different. The function will return once both are filled. If buffer slice lengths are both 0, nothing happens.
buffer_out (ReadableBuffer) – Write out the data in this buffer
buffer_in (WriteableBuffer) – Read data into this buffer
out_start (int) – Start of the slice of buffer_out to write out:
out_end (int) – End of the slice; this index is not included. Defaults to
in_start (int) – Start of the slice of
buffer_into read into:
in_end (int) – End of the slice; this index is not included. Defaults to